ASIC Verification Engineer | M/F



A empresa

Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.

Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.

Synopsys is committed to fostering an environment that treats people with respect, honesty, and professionalism. We’re also committed to partnering with the communities in which we work. Every year, Synopsys reaches out to local communities with resources and employee leadership to support education, science programs and a variety of other activities.
Come and be part of a collaborative team environment that innovates and develops the latest IP solutions that enable the way the world designs.  Join US!

O que procuram

ASIC Verification Engineer

Job Description and Requirements

Seeking a highly motivated and innovative ASIC Digital Verification engineer with knowledge of ASIC Digital development flow or ASIC Analog development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation USB/PCIe/DPHY/CDPHY/MPHY/DP/HDMI products (up to 13.5Gbps). The position offers an excellent opportunity to work with an expert team of digital and mixed signal engineers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on the test-chips.

The PHY development is very dynamic and provides an endless list of challenges. The candidate would have an initial training done by the top experts in the field as well as continuous on the job training and assignments. The work is very challenging, not only given the constant technological changes but also given the ownership and the need to charted unknown waters.
The team lives by the standards:”There are no secrets for success. It is the result of preparation, hard work, and learning from failure”
“Stop being a follower, become a leader”

Main duties might include:
• Review SerDes standards and architecture documents to develop sub-block specifications.
• Participate in the behavioral modeling activities using Verilog/SystemVerilog language
•Participate in the development of verification environments using top of the edge methodologies: System Verilog and UVM
•Perform RTL and gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied
• Participate in the implementation of mixed-signal verification environments and testcase creation
• Participate in evaluation and troubleshooting of digital and mixed signal circuits.
• Work towards improving efficiency in design procedures and methodologies
• Documentation of design and verification environments/plans and overall procedures
• Other related duties as assigned by the upper manager

Development opportunities:
• Become fearless of the unknown
• Develop systematic ways to address new problems, think outside of the box
• Produce high quality work and products
• Have an impact on the new product architectures, quality and development strategies
• Write patents for any inventions

Minimum Requirements:
• Typically Requires a degree in Engineering or Applied Science
• Experience in producing high-quality technical documentation
• Good Organizational skills
• Willingness to learn new things
• Knowledge of IC design flows and analog circuit design would be advantageous.
• Knowledge of Custom Designer tool would be advantageous.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.


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